[dm][sdio] Update for SDHCI - #11684
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Improve the common SDHCI implementation for controllers used across different SoCs and virtual platforms. The changes include: - fix reset and clock stabilization timeout calculations - improve interrupt completion and polling fallback handling - improve signal voltage switching and regulator voltage detection - support controllers without a controllable VQMMC supply - preserve 32-bit SDMA when 64-bit DMA is marked as broken - add an aligned bounce buffer for small and unaligned SDMA transfers - restore the original buffer before completing bounced requests - fix PIO block accounting and buffer advancement across interrupts - improve controller recovery after request errors - handle platform-specific timeout and response behavior Keep the generic non-DM MMC and SD paths unchanged to reduce regression risk for existing MCU and SoC drivers. Tested on SpacemiT K1, Raspberry Pi 4/5, Rockchip platforms, and QEMU PCI SDHCI. Signed-off-by: GuEe-GUI <2991707448@qq.com>
Signed-off-by: GuEe-GUI <2991707448@qq.com>
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📌 Code Review Assignment🏷️ Tag: componentsReviewers: @Maihuanyi Changed Files (Click to expand)
📊 Current Review Status (Last Updated: 2026-08-07 10:14 CST)
📝 Review Instructions
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Pull request overview
English: This PR extends the DM SDIO stack by adding a Synopsys DesignWare MSHC (DWCMSHC) SDHCI platform driver and enhancing the common SDHCI core to better handle timeouts, voltage switching/regulators, and SDMA edge cases across multiple SoCs/platforms.
中文：该 PR 在 DM SDIO 框架下新增 Synopsys DesignWare MSHC（DWCMSHC）SDHCI 平台驱动，并增强通用 SDHCI 核心以改进超时计算、信号电压切换/稳压器处理，以及 SDMA 边界场景，从而提升跨 SoC/虚拟平台的兼容性与稳定性。
Changes:
- Add DWCMSHC SDHCI host + platform driver and build/Kconfig integration. / 新增 DWCMSHC SDHCI 主机与平台驱动，并接入构建与 Kconfig
- Improve SDHCI core behavior (reset/clock timeouts, interrupt completion fallback polling, voltage switch/regulator handling, SDMA bounce buffer). / 改进 SDHCI 核心（复位/时钟超时、完成中断与轮询兜底、电压切换/稳压器处理、SDMA bounce buffer）
- Add regulator voltage capability helpers used by SDHCI capability gating. / 增加稳压器电压能力辅助函数供 SDHCI 能力裁剪使用
Reviewed changes
Copilot reviewed 10 out of 10 changed files in this pull request and generated 5 comments.
Show a summary per file
| File | Description |
|---|---|
| components/drivers/sdio/host/sdhci-dwcmshc.h | New DWCMSHC private structures/macros and probe/remove API. |
| components/drivers/sdio/host/sdhci-dwcmshc.c | New DWCMSHC SDHCI implementation (clock, HS400, tuning, PM, probe/remove). |
| components/drivers/sdio/host/sdhci-dwcmshc-platform.h | Platform registration interface for DWCMSHC. |
| components/drivers/sdio/host/sdhci-dwcmshc-platform.c | OFW-compatible platform driver export for DWCMSHC. |
| components/drivers/sdio/host/SConscript | Build integration for new DWCMSHC sources. |
| components/drivers/sdio/host/Kconfig | New Kconfig option RT_SDIO_SDHCI_DWCMSHC. |
| components/drivers/sdio/dev_sdio_dm.h | Expose new regulator helper prototype. |
| components/drivers/sdio/dev_sdhci.c | Core SDHCI updates (timeouts, polling fallback, voltage switching, SDMA bounce buffer). |
| components/drivers/sdio/dev_regulator.c | Add voltage-support helper + improve voltage set logic for some regulator types. |
| components/drivers/include/drivers/dev_sdhci.h | Extend host struct for bounce tracking and poll work item; formatting updates. |
Suppressed comments (1)
components/drivers/sdio/host/sdhci-dwcmshc.c:92
- [bug/问题]: HS400 path should use 32-bit accessors for DWCMSHC_EMMC_CONTROL to match other accesses in this driver.
English: After making ctrl 32-bit, use rt_sdhci_readl()/writel() here as well so we don’t risk partial writes or bus-width constraints.
中文：在将 ctrl 改为 32 位后，这里也应使用 rt_sdhci_readl()/writel()，避免部分写入或访问宽度受限导致的问题。
/* Set CARD_IS_EMMC bit to enable Data Strobe for HS400 */
ctrl = rt_sdhci_readw(host, priv->vendor_specific_area1 + DWCMSHC_EMMC_CONTROL);
ctrl |= DWCMSHC_CARD_IS_EMMC;
rt_sdhci_writew(host, ctrl, priv->vendor_specific_area1 + DWCMSHC_EMMC_CONTROL);
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| intmask = rt_sdhci_readl(host, RT_SDHCI_INT_STATUS); | ||
| if (!intmask || intmask == 0xffffffff) | ||
| { | ||
| return RT_FALSE; | ||
| } | ||
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| if (!(intmask & (RT_SDHCI_INT_CMD_MASK | RT_SDHCI_INT_DATA_MASK | RT_SDHCI_INT_BUS_POWER))) | ||
| { | ||
| return RT_FALSE; | ||
| } | ||
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| intmask_p = intmask; | ||
| mask = intmask & (RT_SDHCI_INT_CMD_MASK | RT_SDHCI_INT_DATA_MASK | RT_SDHCI_INT_BUS_POWER); | ||
| rt_sdhci_writel(host, mask, RT_SDHCI_INT_STATUS); | ||
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| if (intmask & RT_SDHCI_INT_DATA_MASK) | ||
| { | ||
| sdhci_data_irq(host, intmask & RT_SDHCI_INT_DATA_MASK); | ||
| } | ||
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| void sdhci_dwcmshc_set_uhs_signaling(struct rt_sdhci_host *host, unsigned int timing) | ||
| { | ||
| rt_uint16_t ctrl, ctrl_2; |
| priv->bus_clk = rt_clk_get_by_name(dev, "bus"); | ||
| if (!rt_is_err(priv->bus_clk)) | ||
| { | ||
| rt_clk_prepare_enable(priv->bus_clk); | ||
| } |
| /* | ||
| * No matter V4 is enabled or not, ARGUMENT2 register is 32-bit | ||
| * block count register which doesn't support stuff bits of | ||
| * CMD23 argument on dwcmsch host controller. |
拉取/合并请求描述：(PR description)
[
Add DesignWare MSHC platform support.
Improve the common SDHCI implementation for controllers used across different SoCs and virtual platforms.
The changes include:
Keep the generic non-DM MMC and SD paths unchanged to reduce regression risk for existing MCU and SoC drivers.
Tested on SpacemiT K1, Raspberry Pi 4/5, Rockchip platforms, and QEMU PCI SDHCI.
]
当前拉取/合并请求的状态 Intent for your PR
必须选择一项 Choose one (Mandatory):
代码质量 Code Quality：
我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:
#if 0代码，不包含已经被注释了的代码 All redundant code is removed and cleaned up